Vertical component with high-voltage strength

ABSTRACT

The invention concerns a vertical component with a four-layered structure comprising a thick lightly-doped zone ( 1 ) of a first type of conductivity providing the component voltage strength, enclosed with a peripheral wall ( 2 ) of a second type of conductivity extending vertically from one surface to the other of the component, and highly doped layer ( 3 ) of the second type of conductivity extending over the entire rear surface of the component. A lightly-doped layer ( 21 ) of the second type of conductivity extends over the entire surface of the component at the interface between the lightly-doped thick zone of the first type of conductivity and the highly-doped layer of the second type of conductivity.

[0001] The present invention relates to power components and morespecifically to peripheral structures providing a high breakdown voltagefor the components. The present invention more specifically aims at“four-layer” components, such as thyristors or triacs with a well-typestructure.

[0002]FIG. 1 is a very simplified cross-section view of a well thyristorstructure formed from a lightly-doped N-type substrate 1. The thyristoris delimited by a P-type insulating wall 2. The rear surface isuniformly coated with a P-type layer 3. On the front surface side, aheavily-doped N-type region 5 forming the thyristor cathode is presentin a P-type well 4. An electrode (not shown) forms one piece with layer4 and forms the thyristor gate. An anode metallization A forms one piecewith the rear surface of the component and a cathode metallization K isformed on N+-type region 5. Conventionally, region 5 is provided withemitter short-circuits, that is, the N+ layer is interrupted in placesand metallization K is in contact with portions of P-type layer 4.

[0003]FIG. 2, shows in the same simplified way, the structure of atriac. This triac is formed from a lightly-doped N-type substrate 1surrounded with a P-type doped insulating wall 2. The triac can beconsidered as being formed of two thyristors in anti-parallel. The firstthyristor successively includes, from its anode to its cathode, lowerlayer 3, substrate 1, P-type well 4 and N+-type region 5. The secondthyristor includes, from its anode to its cathode, P-type well 4,substrate 1, P-type region 5 and an N+-type region 7 formed on the lowersurface side substantially opposite to the portion of well 4 in whichregion 5 is not formed. As in the case of the thyristor of FIG. 1, agate region and a gate contact metallization (not shown) are provided onthe upper surface side. A metallization A1 covers the rear surface. Ametallization A2 is in contact with N+ region 5 and P well 4.Conventionally, regions 5 and 7 are provided with emittershort-circuits.

[0004] The vertical structures of the various shown layers are optimizedto obtain desired characteristics of the thyristor or of the triac,especially its sensitivity to voltage variations, sensitivity to currentvariations, on-state voltage drop, gate turn-on current threshold,breakdown voltage, etc.

[0005] However, the reverse biasing breakdown voltage is in practiceessentially determined by the component periphery, as will be discussedhereafter.

[0006] An object of the present invention is to improve this peripheryto optimize the breakdown voltage of a four-layer component such aspreviously described.

[0007] To achieve this objects, the present invention provides a 4-layerstructure vertical component including a thick lightly-doped area of afirst conductivity type determining the breakdown voltage of thecomponent, surrounded with a peripheral wall of the second conductivitytype vertically extending from one surface of the component to theother, and a heavily-doped layer of the second conductivity typeextending over the entire rear surface of the component. A lightly-dopedlayer of the second conductivity type extends over the entire componentsurface at the interface between the lightly-doped thick area of thefirst conductivity type and the heavily-doped layer of the secondconductivity type.

[0008] According to an embodiment of the present invention, thecomponent is a triac, including a heavily-doped area of the firstconductivity type formed on the rear surface side in the heavily-dopedlayer of the first conductivity type, in which said lightly-doped layeris interrupted in front of said heavily-doped area.

[0009] According to an embodiment of the present invention, theheavily-doped area is provided with emitter short-circuits and portionsof the lightly-doped layer are maintained in front of said emittershort-circuits.

[0010] The foregoing and other objects, features and advantages of thepresent invention, will be discussed in detail in the followingnon-limiting description of specific embodiments in connection with theaccompanying drawings, in which:

[0011]FIG. 1 is a simplified cross-section view of a thyristor;

[0012]FIG. 2 is a simplified cross-section view of a triac;

[0013]FIG. 3 is a cross-section view of a conventional thyristor/triacperiphery structure;

[0014]FIG. 4 is a cross-section view of a structure of the periphery ofa thyristor/triac according to the present invention; and

[0015]FIG. 5 is a cross-section view of a structure of the periphery ofa triac according to an alternative of the present invention.

[0016] As usual in the field of semiconductor representation, thevarious layers are not drawn to scale, neither in their horizontaldimensions, nor in their vertical dimensions.

[0017]FIG. 3 essentially shows the peripheral portion of a component. Tothe right of this drawing, the elements constitutive of a thyristor orof a triac are shown, designated by the same references as in FIGS. 1and 2, that is, from the anode to the cathode, a P-type layer 3extending over the entire rear surface, a lightly-doped N-type substrate1, a P-type well 4 and a heavily-doped N-type region 5, within which anemitter short-circuit hole has been shown. The component periphery isoccupied by an insulating wall 2 generally formed by drive-in from theupper and lower surfaces of the substrate.

[0018] The first precaution to be taken to have a satisfactory breakdownvoltage in reverse biasing is that the lateral distance between thelimit of P-type insulating wall 2 and P-type region 4 on the uppersurface side of the substrate is at least equal to the thickness ofsubstrate 1. Further, a channel stop region 11 coated with ametallization 12 possibly extending inwards to form a field plate isgenerally provided. P-type region 4 may be surrounded with alightly-doped P-type ring 13. A contact may be taken on a moreheavily-doped portion 14 of the upper surface of wall 2, by ametallization 15 which comes back towards the inside of the componentand also forms a field plate. N+ regions 16 formed at the componentperiphery and heavily doped with phosphorus are used as getters. As canbe seen, conventional means for increasing the breakdown voltage of acomponent are essentially provided to reduce the probability forbreakdowns to occur at the level of the upper substrate surface. Indeed,this upper surface is a priori the most sensitive, the component sides(wall 3) and bottom (layer 4) forming a same equipotential surface.

[0019] However, whatever precautions are taken, a breakdown inevitablyoccurs at a given voltage. To increase the breakdown voltage, varioussolutions have been provided.

[0020] A first solution consists of increasing the substrate resistivity(decreasing its doping level), but then, the on-state resistance (Ron)of the component increases, and the sensitiveness to triggerings due toabrupt variations of the current (di/dt) upon switchings also increases.

[0021] Another solution consists of increasing the distance between thelimit of the active portions (P region 4) and the insulating wall. Thisof course has the disadvantage of increasing the chip surface area.

[0022] Another solution consists of forming a lightly-doped P-typeregion at the internal periphery of the upper surface of the insulatingwall, similarly to region 13. This solution, like the former, results inan increase in the chip surface area.

[0023] Further, despite their disadvantages, these last two solutionshave not brought remarkable advantages in terms of breakdown voltage.Accordingly, the applicant has once again analyzed the reverse breakdownphenomenon of the structure and has performed various tests andsimulations to check the hypothesis made. Thus, the applicant hasconsidered that the reverse breakdown essentially occurs due to themarked curvature of the field lines in region 18 corresponding to theintersection between insulating wall 2 and lower surface P-type layer 3.

[0024] To solve this problem, as shown in FIG. 4, the present inventionprovides forming a lightly-doped P-type layer 21 at the interfacebetween lightly-doped N-type substrate 1 and heavily-doped rear surfaceP-type layer 3.

[0025] Simulations and tests performed by the applicant show that, whensuch a layer is used, the breakdown no longer occurs at the componentperiphery, but in a central area thereof. The maximum possible breakdownvoltage linked to the characteristics of the vertical structure of the4-layer component has thus been obtained. According to an advantage ofthe present invention, this result is obtained with no surface areaincrease as compared to the conventional structure of FIG. 3.

[0026] In a real example, while a component of the type of that in FIG.3 without P-type layer 21 has a reverse breakdown voltage on the orderof 1,050 volts, a component according to the present invention providedwith layer 21 has a breakdown voltage of 1,350 volts, which improvementis greater than 25%.

[0027] The only disadvantage of the presence of layer 21 in the case ofa thyristor is a slight increase in the on-state voltage drop, whichincreases from 1.25 to 1.32 volts under 11 amperes, that is, an increasesmaller than 5%, which is negligible in practice in most applications.

[0028] In the case where the component is a triac, it has appeared that,in addition to this disadvantage, the triac turn-on threshold current inquadrant Q3 (positive electrode A1, negative electrode A2, negativegate) is high. To overcome this disadvantage, according to the presentinvention, as illustrated in FIG. 5, it is provided to interrupt P-typelayer 21 in front of rear surface N-type layer 7, layer 21 remainingonly outside areas located above layer 7 (see FIGS. 2 and 5). Thissolution provides good results, that is, the sensitivity in quadrant Q3is not visibly altered and the breakdown voltage is 1,220 volts, thatis, a 15% increase instead of a 25% increase is obtained.

[0029] It should be noted that the inserting of the lightly-doped P-typeregion according to the present invention does not complicate thestructure manufacturing process. Indeed, this P-type region can beformed at the same time as P-type region 13, just after the forming ofinsulating walls 2. P-type region 13 will for example have a surfaceconcentration of 10¹⁵ atoms/cm³ and a 50-μm penetration depth.

[0030] Of course, the present invention is likely to have variousalterations, modifications, and improvements which will readily occur tothose skilled in the art. All conductivity types may be inverted. Thepresent invention applies to various alternatives of 4-layer componentsother than thyristors and triacs. Various improvements currently made tothe components may be cumulated with the present invention.

1. A 4-layer structure vertical component including a thicklightly-doped area (1) of a first conductivity type determining abreakdown voltage of the component, surrounded with a peripheral wall(2) of a second conductivity type vertically extending from one surfaceof the component to the other, a heavily-doped layer (3) of the secondconductivity type extending over an entire rear surface of thecomponent, characterized in that it further comprises a lightly-dopedlayer (21) of the second conductivity type extending over an entirecomponent surface at the interface between the lightly-doped thick areaof the first conductivity type and the heavily-doped layer of the secondconductivity type.
 2. The vertical component of claim 1, forming atriac, including a heavily-doped area of the first conductivity type (7)formed on the rear surface side in the heavily-doped layer of the firstconductivity type (3), wherein said lightly-doped layer (21) isinterrupted in front of said heavily-doped area (7).
 3. The component ofclaim 2, wherein the heavily-doped area (7) is provided with emittershort-circuits and wherein portions of the lightly-doped layer (21) aremaintained in front of said emitter short-circuits.